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| AP4953GM Pb Free Plating Product Advanced Power Electronics Corp. Simple Drive Requirement Low On-resistance Fast Switching D1 G2 S2 D2 D1 D2 P-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID -30V 53m -5A SO-8 S1 G1 Description The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and costeffectiveness. The SO-8 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters. G1 D1 D2 G2 S1 S2 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating - 30 20 -5 -4 - 20 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Max. Value 62.5 Unit /W Data and specifications subject to change without notice 20020513 AP4953GM Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=-250uA Min. -30 -1 - Typ. -0.1 Max. Units 53 90 -3 -1 -25 100 15 880 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=-1mA RDS(ON) Static Drain-Source On-Resistance VGS=-10V, ID=-5A VGS=-4.5V, ID=-4A 6 9 2 5 11 9 25 12 550 180 130 VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=-250uA VDS=-10V, ID=-5A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS=20V ID=-5A VDS=-24V VGS=-4.5V VDS=-15V ID=-1A RG=3.3,VGS=-10V RD=15 VGS=0V VDS=-25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol VSD Parameter Forward On Voltage 2 2 Test Conditions IS=-1.7A, VGS=0V IS=-5A, VGS=0V, dI/dt=100A/s Min. - Typ. 24 19 Max. Units -1.2 V ns nC trr Qrr Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135 /W when mounted on Min. copper pad. AP4953GM 20 20 T A =25 C -ID , Drain Current (A) 15 o -10V -8.0V -6.0V 15 T A =150 o C -10V -8.0V -6.0V 10 V G =-4.0V -ID , Drain Current (A) 10 V G =-4.0V 5 5 0 0 1 2 3 4 0 0 1 2 3 4 5 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 70 1.8 I D =-4A T A =25 60 1.6 I D =-5A V G =-10V 1.4 Normalized R DS(ON) RDS(ON) (m ) 1.2 50 1.0 0.8 40 3 5 7 9 11 0.6 -50 0 50 100 150 -V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 3 100.00 10.00 2 T j =150 o C -IS(A) 1.00 T j =25 o C -VGS(th) (V) 1 0 1.3 -50 0.10 0.01 0.1 0.3 0.5 0.7 0.9 1.1 0 50 100 150 -V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP4953GM f=1.0MHz 14 10000 12 -VGS , Gate to Source Voltage (V) I D =-5A V DS =-24V 10 8 C (pF) 1000 6 C iss 4 2 C oss C rss 100 0 4 8 12 16 20 1 5 9 13 17 21 25 29 0 Q G , Total Gate Charge (nC) -V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty Factor = 0.5 Normalized Thermal Response (Rthja) 0.2 10 1ms -ID (A) 1 0.1 0.1 0.05 10ms 100ms 1s 0.02 0.01 PDM 0.01 Single Pulse t T Duty Factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=135oC/W 0.1 T A =25 C Single Pulse o 10s DC 0.01 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG -4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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